MOSFET corner models for SPICE circuit simulations are used to verify circuit operations when electrical characteristics of MOSFETs vary to a maximum extent due to a variation in production. A MOSFET is a semiconductor device that has four terminals, i.e., a gate terminal, a source terminal, a drain terminal, and a substrate terminal. The electrical characteristics of a MOSFET are represented for example by the magnitude of the current (drain current) that flows in the drain terminal when a voltage is applied to those terminals.
Indicators that define the electrical characteristics of each MOSFET include a threshold voltage and an on-current. The threshold voltage is the magnitude of the gate voltage at which the drain current starts flowing. The on-current is the magnitude of the drain current observed when a supply voltage is applied between the gate terminal and the source terminal, and between the drain terminal and the source terminal.
Corner models are generated, normally with variations in the threshold voltage and the on-current being taken into consideration. In the following, a case where variations in the on-current are taken into consideration is explained, but the same concept may be applied to the threshold voltage and other indicators. The on-current varies in the two directions, the one in which the on-current becomes larger than the reference value, and the other in which the on-current becomes smaller than the reference value.
If one kind of MOSFET is used in the circuit, two corner models corresponding to the maximum variation width in the two directions are prepared, and operation verification is performed on respective circuit characteristics with the two corner models. If two kinds of MOSFETs are used in the circuit, each of the two kinds of MOSFETs has a variation in two directions, and therefore, the number of combinations of corners is 22=4 in total.
If the two kinds of MOSFETs do not interfere each other, the four corner models formed by combining the two corner models of one of the MOSFETs with the two corner models of the other should be evaluated. In practice, however, there is a correlation between the on-current variations of the two kinds of MOSFETs. The on-currents of two kinds of MOSFETs sometimes vary in the same directions (or become larger or smaller at the same time), and sometimes vary in opposite directions (the on-current of one of the two kinds of MOSFETs becomes larger while the on-current of the other becomes smaller). Normally, the on-currents tend to vary in the same directions, and rarely vary in opposite directions.
The reasons for that are as follows. The principal causes of on-current variations are the length L of the gate electrode, the width W of the gate electrode, the thickness Tox of the gate insulator, and the impurity concentration Nch in the channel portion of the MOSFET. Among those causes, the length L, the width W, and the thickness Tox tend to vary in the same directions with respect to the respective reference values, since the gate electrodes and the gate insulators of MOSFETs of different kinds are formed through the same manufacturing procedures. Therefore, as for L, W, and Tox, there are strong correlations between the variations of two kinds of MOSFETs. Meanwhile, introduction of impurities into the channel portion for controlling the threshold voltage in MOSFETs of different kinds is performed in separate manufacturing procedures from one another. Accordingly, there is only a small correlation between the Nch variations of two kinds of MOSFETs. As a result, L, W, and Tox contribute to the variations in the same directions, but only Nch contributes to the variations in the opposite directions. When the same directional variations and the opposite directional variations are compared with each other, the magnitude of the variations in the opposite directions is smaller than the magnitude of the variations in the same directions.
Here, an NFET and a PFET that have substantially same absolute values in threshold voltage and form a pair are described as an example of two different MOSFETs. The on-current variations are assumed to be larger in the same directions and smaller in opposite directions in those MOSFETs.
In a MOSFET corner model for SPICE circuit simulations, the distribution of the on-current variations of those MOSFETs is expressed in X-Y coordinates, with the X-coordinate indicating the on-current of the NFET, the Y-coordinate indicating the on-current of the PFET. Here, the variation distribution is represented by an elliptic form, because the on-current variations of those MOSFETs are larger in the same directions and are smaller in opposite directions.
With the properties of the on-current variations being taken into consideration, the two corner models (FF and SS) of cases where the absolute values of the on-currents of the NFET and the PFET vary in the same directions are set with greater corner widths than the two corner models (FS and SF) of cases where the absolute values of the on-currents vary in opposite directions. Here, the corner width is the distance from the typical model (TT) equivalent to the reference value of those on-currents to each corner model. In the X-Y coordinates, TT is located at the center point of the ellipse, FF and SS are located on the long axis of the ellipse, and FS and SF are located on the short axis of the ellipse.
Normally, the corner models corresponding to the same directional variations are the corner models of the corner widths having the influence of all the causes of variation. On the other hand, the corner models corresponding to the opposite directional variations have corner widths attributed to the causes of the opposite directional variations generated only in the manufacturing procedures applied to the two kinds of MOSFETs independently of each other. The variations attributed only to the independently applied manufacturing procedures are the variations only in impurity concentration or the variations in impurity concentration and gate insulator thickness, for example.
The corner models prepared as above are put into one library for each one direction of the two same directions and two opposite directions. As a result, each library contains one corner model of each MOSFET. For example, in the library “FS”, one NFET appears only once, and the corner model of the NFET is the corner model corresponding to the magnitude of the opposite directional variations observed when a pair is formed by combining the NFET with a PFET having substantially same absolute value of the threshold voltage as the NFET.
However, the conventional technique has the following drawbacks.
For example, a differential amplifier circuit formed by combining two low-Vth NFETs each having a low threshold voltage with a high-Vth NFET having a high threshold voltage is now described. To secure the current driving force for the differential pair portion in this circuit, low-Vth (low threshold voltage, large on-current) NFETs are used. For the other portions, a high-Vth (high threshold voltage, small leakage current and small on-current) NFET is used to reduce leakage.
One of the requirements for performing operation verification to check the influence of variations in this circuit is that the on-currents of the low-Vth NFETs are smallest while the leakage current and the on-current of the high-Vth NFET are largest. This is equivalent to operation verification performed on the opposite directional variations of the low-Vth NFETs and the high-Vth NFET.
However, for such a combination of low-Vth NFETs and a high-Vth NFET, corner models for appropriately verifying an operation where the on-currents vary in opposite directions are normally not prepared, though such corner models are prepared for an NFET and a PFET that have substantially same absolute values in threshold voltage and form a pair as described above. Therefore, circuit operation verification cannot be performed with the use of corner models.
In a case where an operation with the same directional variations, instead of the opposite directional variations, is verified, operation verification can be performed by using a combination of the corner models of the NFET from the corner models of the same directional variations of a low-Vth NFET and PFET, with the corner models of the NFET from the corner models of the same directional variations of a high-Vth NFET and PFET.
However, the corner widths of opposite directional variations vary among combinations of MOSFETs, and the same combination cannot be applied to them. Therefore, to perform operation verification with the opposite directional variations of the above described example case, a Monte Carlo simulation that requires a long period of time needs to be performed, and circuit operation verification cannot be performed in a short TAT (Turn Around Time). A Monte Carlo simulation is a technique for evaluating the thousands of simulation results and the distribution of circuit characteristics by repeating a circuit characteristics simulation thousands of times while providing random numbers to the physical parameters corresponding to the gate length, the gate width, the gate insulator thickness, and the channel impurity concentration in the MOSFET model.
Meanwhile, it is difficult to prepare corner models of opposite directional variations for all the combinations of MOSFETs, because of the structures and configurations of libraries. Normally, a corner model of each MOSFET appears only once in each library and each corner model is referred to by “library name×MOSFET name”. Therefore, the combination of an A-NFET and an A-PFET and the combination of an A-NFET and a B-NFET cannot be included as the corner models of the opposite directional variations of A-NFETs in the library “FS”, since two A-NFETs cannot be included at the same time.
As described above, for combinations of MOSFETs other than the combination of an NFET and a PFET having substantially same absolute values in threshold voltage, circuit operation verification taking opposite directional variations into consideration cannot be performed in a short TAT with the use of SPICE corner models.
JP-A 2002-43429 (KOKAI) discloses a simulation method for determining variations in the device parameters of the corners by determining the device parameter sensitivity through a circuit simulation and applying the device parameter sensitivity and the values of electrical characteristics required for the corners to have, to the normal equation of the linear least-squares method.